The novel feature of the designed system is that the two required logic gates for the half adder (an AND and an XOR logic gate integrated in parallel) or the half subtractor (an XOR and an INHIBIT ...

This is the groundwork for the half adder . The next step is the operational logic, which of course falls upon macros: /* Full adder macros */ /* Out = (A ^ B) ^ cin */ #define FULL_ADD_OUT( a ...